(a) Field of the Invention
The present invention relates to a method suited for manufacturing a semiconductor device having a polymetal gate electrode structure.
(b) Description of the Related Art
Along with development of finer pattern, higher integration density and higher performance of semiconductor devices, it has become one of the key subjects to reduce the electric resistance of word lines in a DRAM device. A tungsten polycide electrode including a tungsten silicide (WSi2) layer and a polysilicon layer has been generally used as the word lines in the conventional DRAM device. However, in order to further achieve a lower resistance of the word lines, a polymetal electrode including a metallic layer such as made of tungsten (W) and a polysilicon layer is increasingly used instead of the tungsten polycide electrode. The polymetal electrode including a tungsten layer reduces the resistance of the world lines down to ⅓ or less of the resistance of the word lines in the conventional DRAM device. The tungsten polymetal electrode generally includes a thin WSi2 layer and a tungsten nitride (WN) layer between the tungsten layer and the polysilicon layer for suppressing the reaction therebetween and thus reducing the contact resistance. A typical structure of the DRAM device is described in Patent Publication JP-1999-340436A, for example. The structure of the polymetal electrode is described in JP-2001-326350A, for example.
FIG. 7 shows an example of the polymetal electrode structure used for a gate electrode of a MOSFET in a DRAM device. The semiconductor device includes a silicon substrate 70, on which a shallow isolation trench (STI) structure 71 is formed to isolate the surface portion of the silicon substrate 70 into a plurality of device areas or element forming regions. The device areas include an active layer including therein diffused regions, and a gate insulating film formed thereon. A gate electrode formed on the gate insulating film 72 includes a bottom electrode layer 73 made of polysilicon, a top electrode layer 75 made of tungsten/tungsten nitride (W/WN), and a WSi2 layer 74 interposed therebetween for reducing the contact resistance.
A mask oxide film 76 is formed on the top electrode layer 75, the mask oxide film 76 acting as an etching mask during patterning the gate electrode structure and isolating the top electrode layer 75 from an overlying polysilicon pad configuring cell contact 79. A sidewall oxide film 78 is formed on the side surface of the entire gate electrode structure, the sidewall oxide film 78 being used for forming the cell contact 79 in a self-alignment process and isolating the cell contact 79 from the gate electrode structure. Other than the gate electrode structure, there are provided ordinary structures including bit lines 83 attached with mask nitride layer 84 and sidewall nitride film 85, cell capacitors including bottom electrode 89, capacitor insulation film 90 and top electrode 91, capacitor contact plugs 87, interlevel dielectric films 86, 88, 92, and aluminum interconnection lines 93.
Upon forming the gate electrodes in the DRAM device, an oxidization process for oxidizing the side surface of the gate electrodes and top of the diffused regions is performed after the etching step for patterning the gate electrode structure. The sidewall oxide film formed by the oxidation process improves the refreshing characteristic of the DRAM device, and the reliability of the characteristic of the cell transistor. Since tungsten is liable to oxidation, oxidization of the polymetal gate electrode is generally conducted as a WH oxidation under a hydrogen atmosphere. The WH oxidation may involve some problems, however, as will be described hereinafter.
The first problem is that the tungsten disperses during the WH oxidization, and may attach onto the silicon substrate, to degrade the refreshing characteristic of the DRAM device. The second problem is that the tungsten silicide layer interposed between the polysilicon layer and the tungsten layer in the gate electrodes is also oxidized during the WH oxidization to increase the interface resistance. For solving these problems, a protective sidewall film 77 made of silicon nitride is formed on the side surface of the gate electrodes to prevent the dispersion of tungsten and increase of the interface resistance.
Along with development of the finer pattern in the DRAM device, the width of the word lines is also reduced, which emphasizes the importance of small thickness of the protective sidewall film formed on the side surface of the word lines. This is because the width of the word lines increases by double the thickness of the protective sidewall film. Increase of the thickness of the tungsten layer, if employed for compensating a smaller width of the word lines, to reduce the line resistance causes a difficulty in the patterning process for patterning the word lines. Thus, the thickness of the protective sidewall film raises the problem of higher resistance even in the case of using the polymetal structure in the gate electrode.
In addition, the WH oxidation performed in the hydrogen atmosphere or wet atmosphere may cause ingress of oxidation into the interface between the polysilicon layer and the gate insulating film, to thereby form a bird's beak therein. The bird's beak, if formed on both sides of the word lines, may be an isolation film especially in the case of a smaller width of the word lines. This provides an apparent larger thickness of the gate insulting film, to degrade the transistor characteristics. Thus, it is not desirable to provide a larger amount of side oxidation in the WH oxidation, although the larger amount of side oxidation may assure an improved refreshing characteristic of the DRAM device.